Reduced capacitance scaled HBT using a separate base post layer
US6566693B1 · kind B1 · utility
2Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2000 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Sep 26, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/89
Abstract
High-speed, low capacitance heterojunction bipolar transistors (HBTs) and a method for their fabrication are disclosed. The devices are fabricated by a manufacturable process which moves patterning and deposition of the base post up versus the current manufacturing process, thus permitting fabrication of a smaller base post and base metal contact and reducing the base-collector capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.