Pinned photodiode five transistor pixel
US6566697B1 · kind B1 · utility
35Cited by
34References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2002 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Jan 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/803
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel includes five transistors, a pinned photodiode and a storage node. A first transistor is coupled between the pinned photodiode and the storage node. A second transistor is coupled between the storage node and an output drain voltage. A third transistor is coupled between the pinned photodiode and a pixel reset voltage. The pixel reset voltage is different than the output drain voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.