Lead frame for a semiconductor device and method of manufacturing a semiconductor device
US6566740B2 · kind B2 · utility
66Cited by
4References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Mar 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame for a semiconductor device. The lead frame has a layer defining a first unit lead frame including a first support for a semiconductor chip and a plurality of leads spaced around the first support. The first support has a peripheral edge. The layer further defines a guide rail extending along at least a portion of the peripheral edge and connected to at least one of the leads. At least one notch is formed in the layer between the at least one lead and a part of the guide rail so as to define a first tie bar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.