Semiconductor module
US6566750B1 · kind B1 · utility
9Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plurality of semiconductor chips are provided on a base substrate. A drain region of the respective semiconductor chip is directly connected to the base substrate. A source electrode is formed in parallel with the arranging direction of the plurality of semiconductor chips. A source electrode and a source region of the respective semiconductor chip are connected using bonding wires. A plurality of source terminals are connected to the source electrode. A plurality of drain terminals are connected to the base substrate. The source terminal and drain terminal are located close to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.