Method and apparatus for single-ended sense amplifier and biasing
US6566913B2 · kind B2 · utility
4Cited by
11References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Feb 1, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356139
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for sensing logic signals is described. A single-ended sense amplifier may include a differential input with a data input transistor and a dummy input transistor. A controlled offset in the size of the data input transistor and the dummy input transistor may increase noise immunity and other performance attributes. A dummy complimentary path may include a partial set of complimentary transistors to a data set of transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.