Nonvolatile semiconductor memory device and method of erasing data of nonvolatile semiconductor memory device
US6567316B1 · kind B1 · utility
18Cited by
9References
8Claims
0Family size
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Key dates
| Filing date | Nov 1, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Nov 1, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Operations of applying an erase pulse and further performing block program before erasure are executed in steps S2 and S3 before applying the erase pulse on a block by block basis. This narrows the distribution width of the threshold voltage, and reduces the number of the memory transistors to be subjected to over-erase verify so that a total erasing time of data of a flash memory can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.