DSL modem utilizing low density parity check codes
US6567465B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2001 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Jun 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2602
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A DSL modem with a receiver and a transmitter includes an LDPC encoder which utilizes a generation matrix G which is derived from a substantially deterministic H matrix in order to generate redundant parity bits for a block of bits. The H matrix is determined by assigning “ones” of a first column Nj randomly or deterministically. Then, beginning with the second column, assignment of “ones” is carried out deterministically with each “1” in a previous ancestor column generating a “1” in the next descendant column based on the rule that a descendant is placed one position below or above an ancestor. As a result, descending or ascending diagonals are generated. When distributing “ones” in any given column, care is taken to ensure that no rectangles are generated in conjunction with other “ones” in the current column and previous columns. By avoiding generation of rectangles, diagonals are interrupted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.