Burst synchronizing circuit
US6567484B1 · kind B1 · utility
18Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 1999 |
| Grant date | May 20, 2003 |
| Priority date | — |
| Expiry date | Jul 14, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A burst synchronizing circuit synchronizes a received data signal in a burst fashion and sampling phases with which the received data signal is sampled. A first part samples a data pattern with different sampling phases. A second part selects the received data signal sampled with an optimal sampling phase based on sampling phases with which the data pattern is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.