Method and apparatus for providing a clock signal to a semiconductor chip
US6570429B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 20, 2000 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Oct 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock distribution tree for use with a semiconductor chip. The package for a semiconductor chip includes a clock distribution tree having a plurality of output terminals for connection to a plurality of input pads on a semiconductor chip. According to one embodiment, the semiconductor chip includes a clock receiving and conditioning circuit which is coupled to a clock input signal line. The clock receiving and conditioning circuit receives a clock signal, filters it, amplifies it and outputs it back to the package having a clock distribution tree thereon. The clock distribution tree thereafter distributes the clock signal to the appropriate locations of the semiconductor chip through clock output terminals coupled to clock input paths on the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.