Differential interpolated analog to digital converter
US6570522B1 · kind B1 · utility
12Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2002 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Jan 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/141
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter (ADC), including a plurality of first-level folded-differential-logic-encoders (FDLEs), coupled to receive an analog input signal and respective reference voltages and to provide respective outputs responsive to comparing a magnitude of the input signal to the respective reference voltages. The ADC has a second-level resultant FDLE, which is coupled to receive and combine the outputs of the first-level FDLEs to provide a digital value indicative of the magnitude of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.