Parallel processing processor and parallel processing method
US6570570B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 1999 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Jul 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2352/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel processing processor for processing images including &agr; data indicative of pixel transparency. The parallel processing processor comprises: a plurality of execution units for executing in parallel arithmetic and logical operations under control of a single instruction; general purpose registers which are connected to the execution units via a data path, which input data to the execution units and which receive results of operations from the execution units; &agr; data dedicated registers which are connected to the execution units via another data path and which input data to the execution units; and a control circuit for directing data from the general purpose registers and &agr; data dedicated registers into each of the execution units under control of a single instruction. Under the instruction, the execution units admit data from the general purpose registers to carry out first arithmetic and logical operation in parallel on the admitted data and, without returning result of the first arithmetic and logical operation to the general purpose registers, receive data from the &agr; data dedicated registers to perform second arithmetic and logical operation in parallel …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.