Non-aligned double word access in word addressable memory
US6571327B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1999 |
| Grant date | May 27, 2003 |
| Priority date | — |
| Expiry date | Aug 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/345
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus which generates even addressed words and odd addressed words in a memory. The apparatus consists of a port adapted for receiving an address, one or more even units in operative communication with the port and one or more odd units in operative communication with the port. The even units output an even address and the odd units output and odd address. If the input address is even the even address is equal to the input address and if the input address is odd the even address is spaced from the input address by N addresses, where N is an odd integer. If the input address is odd, the odd address is equal to the input address and if the input address is even, the odd address is spaced from the input address by N addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.