High voltage push-pull driver on standard CMOS

US6573752B1 · kind B1 · utility

Assignee

• DIALOG SEMICONDUCTOR INC. · DE

Inventor

• Dirk Killat · Kirchheim unter Teck, DE

Key dates

• Filing date: Jan 10, 2002
• Grant date: Jun 3, 2003
• Expiry date: Jan 14, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K17/102
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A new high voltage, high side driver circuit has been achieved. The circuit comprises, first, a top PFET having gate, drain, source, and bulk. The gate is coupled to a switching signal. The source is coupled to a high voltage. Second, a top resistor has first and second terminals. The first terminal is coupled to the high voltage. Third, a middle PFET cell comprises a middle PFET having gate, drain, source, and bulk. The source is coupled to the top PFET drain. The gate is coupled to the top resistor second terminal. A middle resistor has first and second terminals. The first terminal is coupled to the middle PFET gate. Finally, a middle means of claimping the middle PFET gate and a clamping voltage completes the middle PFET cell. Fourth, a bottom PFET cell comprises, first, a bottom PFET having gate, drain, source, and bulk. The gate is coupled to the middle resistor second terminal, the source is coupled to the middle PFET drain, and the drain forms a high side driver output. A bottom resistor is coupled between the bottom PFET gate and the high side driver output. Finally, a bottom means of clamping the bottom PFET gate and the clamping voltage completes the bottom cell. A low s…