Signal line matching technique for ICS/PCBS
US6573757B1 · kind B1 · utility
6Cited by
31References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2000 |
| Grant date | Jun 3, 2003 |
| Priority date | — |
| Expiry date | Sep 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09781
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising an output connected to a plurality of inputs through a tree of connections. Each of one or more branches of the tree may be equidistant between the output and each of the plurality of inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.