Power ground short circuit, with adjustable activation delay and activation time period
US6573767B1 · kind B1 · utility
4Cited by
4References
42Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 11, 2001 |
| Grant date | Jun 3, 2003 |
| Priority date | — |
| Expiry date | Oct 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power ground short circuit with adjustable activation delay and activation time period eliminates latent voltages in the power down/ off discharging circuitry. The circuit uses an internal back up power storage device to supply power on power down. A comparator determines when the power down condition occurs. Two timers are used to generate an activation signal for a charge pump. The charge pump is responsible for turning on a pair of transistors which bring the power bus voltage down to a zero level. A slew rate detector enables the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.