Fast relief swapping of processors in a data processing system
US6574748B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2000 |
| Grant date | Jun 3, 2003 |
| Priority date | — |
| Expiry date | Jul 7, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2041
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system with multiple processors, failing processors are replaced with spare processors. This allows the system to continue to operate without degradation. An intercept process is notified of a processor failure so that it can collect processor registers and states. If the registers and states are collected correctly, an indication is set that relief is possible. The intercept process notifies a service processor of the failure and then halts the failed processor. The service processor then notifies the operating system of the failure and that relief is possible. If fast relief is acceptable, a spare processor is initialized and resumes execution with the state and registers of the failed processor. A service processor modeling file controls the number of active and spare processors in a system. Spare processors sharing the same L2 cache with the failed processor are preferred as replacements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.