Method and circuit for digital division
US6578062B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1999 |
| Grant date | Jun 10, 2003 |
| Priority date | — |
| Expiry date | Oct 13, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/535
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for calculating a quotient from a dividend and a divisor, wherein the divisor can be represented as (2N+2M) where N is greater than M, and wherein the dividend comprises an X-bit binary number divisible by the divisor without a remainder. The values of N and M for the dividend are determined such that the divisor is equal to the value (2N+2M). The M-th through the (N−1)-th bits of the dividend are selected as lower order bits of the quotient. The (N−1)-th and the (2N−M−1)-th bits of the dividend are examined. If the (N−1)-th bit of the dividend is “1” and if the (2N−M−1)-th bit of the dividend is “0”, then one is subtracted from a value represented by the (2N−M)-th through the (X−1)-th bits of the dividend to obtain a result as higher order bits of the quotient. Otherwise, the (2N−M)-th through the (X−1)-th bits of the dividend are selected as higher order bits of the quotient. Finally, the higher order bits and the lower order bits are concatenated to obtain the quotient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.