FIFO buffers receiving data from different serial links and removing unit of data from each buffer based on previous calcuations accounting for trace length differences
US6578092B1 · kind B1 · utility
16Cited by
3References
43Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1999 |
| Grant date | Jun 10, 2003 |
| Priority date | — |
| Expiry date | Apr 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/005
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication interface is described to align at a destination data transmitted through different channels before that data is read out. The communication interface includes a receiver circuit that has a plurality of buffers. Each buffer is coupled to a corresponding channel to receive data therethrough. The communication interface also includes a control circuit, coupled to the plurality of buffers, to enable reading of data from the plurality of buffers when each of the plurality of buffers has received at least one unit of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.