Tracking and control of prefetch data in a PCI bus system
US6578102B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2000 |
| Grant date | Jun 10, 2003 |
| Priority date | — |
| Expiry date | Apr 18, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method track and control the prefetching of blocks of a data stream in a PCI bus system, avoiding unnecessary prefetches. The data stream is grouped into major blocks which comprise a fixed plurality of contiguous blocks. A prefetch buffer stores the blocks of data prefetched from a PCI data source for transfer to a requester. First and second associated prefetch count storage locations store first and second counts initialized by prefetch initialization logic. The first count represents the number of blocks of data of a major block of the data, and the second count represents the total number of the blocks of the data stream to be prefetched, less the initialized number of blocks of the first count. As each block of data is prefetched, a prefetch counter decrements the first count by a number representing the block of data. As the prefetch counter decrements the first count to zero, prefetch count logic stops the prefetch, allowing completion of the transfer of the prefetched data to the data destination. Thus, the second count represents the next remaining number of blocks to be prefetched, and the requester can rotate to a different read request at the end of a majo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.