Neuronal phase-locked loops
US6581046B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 9, 1998 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Oct 9, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/049
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neuronal phase-locked loop (NPLL) that can decode temporally-encoded information and convert it to a rate code is based on an algorithm similar to that of the electronic PLL, but is a stochastic device, implemented by neural networks (real or simulated). The simplest embodiment of the NPLL includes a phase detector (that is, a neuronal-plausible version of an ideal coincidence detector) and a controllable local oscillator that are connected in a negative feedback loop. The phase detector compares the firing times of the local oscillator and the input and provides an output whose firing rate is monotonically related to the time difference. The output rate is fed back to the local oscillator and forces it to phase-lock to the input. Every temporal interval at the input is associated with a specific pair of output rate and time difference values; the higher the output rate the further the local oscillator is driven from its intrinsic frequency. Sequences of input intervals, which, by definition, encode input information, are thus represented by sequences of firing rates at the NPLL's output. The NPLL is an adaptive device which can deal with signals whose exact characteristics are n…
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