Methodology for classifying an IC or CPU version type via JTAG scan chain
US6581190B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1999 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Nov 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318558
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method in a data processing system for identifying a circuit. In a preferred embodiment, a set of bits, with a defined chain length, are shifted into the circuit one bit at a time. The bits shifted out from the circuit are compared to the bits, from the set of bits, shifted into the circuit to determine if the circuit corresponds to a first type circuit. The comparing step is accomplished before all bits in the set of bits have been shifted into the circuit. If the circuit is not a first type circuit corresponding to the set of bits shifted into the circuit, then the shifting of bits into the circuit is discontinued and the process is repeated with a second set of bits corresponding to a second circuit type until the circuit type has been identified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.