Method of fabricating microchannel array structure embedded in silicon substrate
US6582987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2001 |
| Grant date | Jun 24, 2003 |
| Priority date | — |
| Expiry date | Dec 14, 2021 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2201/058
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The present invention is disclosed a microchannel array structure embedded in a silicon substrate and a fabrication method thereof. The microchannel array structure of the present invention is formed deep inside the substrate and has high-density microscopic micro-channels. Besides, going through surface micromachining, physical and chemical properties of the silicon substrate are hardly influenced by the fabrication procedures. With microchannels buried in the substrate, the top of a microchannel array structure becomes flat, minimizing the effect of step height. That way, additional devices such as passive components, micro sensors, micro actuators and electronic devices can be easily integrated onto the microchannel array structure. The microchannel array structure of the present invention can be employed as a basic fluidic platform for miniaturizing and improving perfomances of electronic device coolers as well as such fluidic micro-electro-mechanical system (MEMS) devices as biochips, microfluidic components and chemical analyzers, lab-on-a-chips, polymerase chain reaction (PCR) amplifiers, micro reactors and drug delivery systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.