Etching heterojunction interfaces
US6586113B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2000 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Oct 30, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/12681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer is deposited on a substrate, a transition etch layer is deposited over the bottom layer, and a top layer is deposited over the transition etch layer. The transition etch layer substantially prevents the bottom layer and the top layer from forming a material characterized by a composition substantially different than the bottom layer and a substantially non-selective etchability with respect to the bottom layer. By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer enables one or more vias to be etched down to the top surface of the bottom layer in a reliable and repeatable manner. In particular, because the transition etch layer enables use of an etchant that is substantially selective with respect to the bottom layer, the thickness of critical device layers may be determined by the precise epitaxial growth p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.