Trench-gate semiconductor devices
US6586800B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 11, 2001 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Jul 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A trench-gate MOSFET or ACCUFET has its gate (21) in a first trench (20) that extends through a channel-accommodating body region (15) to a drain region (14). Within the transistor cells, a second trench (40) comprising deposited highly-doped semiconductor material (41) extends to the drain region (14). This highly-doped material (41) is of opposite conductivity type to the drain region (14) and, together with a possible out-diffusion profile (42), forms a localized region (41, 42) that is separated from the first trench (20) by the body region 15. A source electrode (23) contacts the source region (13) and the whole top area of the localized region (41, 42). In a MOSFET, the localized region (41, 42) provides protection against turning on of the cell's parasitic bipolar transistor. In an ACCUFET (FIG. 9), the localized region (41, 42) depletes the channel-accommodating body region (15A). In both devices the localized region (41, 42) is well-defined and can be narrow to enable a small transistor cell size. Furthermore, before filling the second trench (40) with its semiconductor material (41), the drain region (14) can be readily provided with an avalanche-breakdown region (64) at …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.