Phase shift circuit and FM detector circuit
US6586922B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2001 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Mar 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00234
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Transistors (12a, 12b) turn on and off with mutually opposite phase input signals. Capacitors (16a, 16b) discharge when the transistors (12a, 12b) turn on, and capacitors (16a, 16b) are charged by constant current from constant current sources (18a, 18b) when the transistors (12a, 12b) turn off. As a result, a gradually rising voltage is obtained at the positive input ends of comparators (14a, 14b) while the input signals are L. By comparing this with fixed voltages of reference sources (20a, 20b), signals having rise timing shifted from input signals by 90° are obtained. The outputs of the comparators (14a, 14b) are mutually shifted by 180°, and at the rise of these outputs, an RS flip-flop (22) is set and reset so that signals delayed in phase by 90° with respect to the input signals are obtained at its outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.