Method for reducing short circuit current during power up and power down for high voltage pad drivers with analog slew rate control
US6586974B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2002 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | May 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A technique for preventing high current shorts through I/O pads of an integrated circuit during power up and power down is presented. In accordance with the invention, the voltage levels of the core power supply that powers the internal circuitry of the integrated circuit and the I/O power supply that powers the input and/or output pad drivers is monitored to detect the condition wherein the core power supply is powered down and the I/O power supply is powered up. Upon detection of this condition, the pad drivers are disabled, preferably by disabling the pre-drivers that generate the pre-drive signals that drive the output driver devices. In a preferred embodiment, the process/voltage/temperature adjustment circuitry is leveraged to disable the output pads during power up and down.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.