Dynamic flip flop
US6586981B2 · kind B2 · utility
7Cited by
6References
29Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 13, 2001 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Dec 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
It is intended to provide a dynamic flip flop that prevents a floating signal from maintaining a voltage below a substrate voltage level in a P-type semiconductor substrate and that prevents a floating signal from maintaining a voltage exceeding the substrate voltage level in an N-type semiconductor substrate. In the dynamic flip flop, an N-type MOSFET (5) controlled by an output signal MX from an inverter (2) and an N-type MOSFET (6) controlled by an output signal Q from an inverter (4) are provided as switches for short-circuiting a signal M and a signal QX to be brought into a floating state to a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.