Nonvolatile memory using flexible erasing methods and method and system for using same
US6587382B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2002 |
| Grant date | Jul 1, 2003 |
| Priority date | — |
| Expiry date | Jun 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.