Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids
US6591230B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2000 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/0328
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coprocessor (15) for synthesizing a signal from the sum of sinusoids preferably includes an electronic system (20) having a host processor (12) that forwards frame boundary parameters to the coprocessor (15). Parameter registers (26) in coprocessor (15) store synthesis parameters for iteratively deriving amplitude and phase values for each sample point within a data frame. Adders (28, 30, 32) generate current amplitude from one addition, and current phase value from two additions, with the results stored back into parameter registers (26). A sine function calculator circuit (34), which may use a CORDIC technique, receives the current amplitude and phase values, and generates a digital component signal for the current sample point for one of the sinusoids. Digital component signals are accumulated at the sample point in a data sample buffer (40) and output at an output (44).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.