LDMOS field effect transistor with improved ruggedness in narrow curved areas
US6593621B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2001 |
| Grant date | Jul 15, 2003 |
| Priority date | — |
| Expiry date | Aug 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A lateral DMOS transistor incorporates one or more enhancement schemes for improving the breakdown voltage characteristics and ruggedness of the transistor. In one embodiment, the drain region of the lateral DMOS transistor is separated from the body region by a first distance in the rectilinear region necessary to achieve a first breakdown voltage, and separated by a second distance in the curved region necessary to achieve at least the first breakdown voltage, the second distance being greater than the first distance. In another embodiment, the gate partially overlies the field oxide region by a third distance in the rectilinear region and by a fourth distance in the curved region, the fourth distance being greater than the third distance. The enhancement schemes optimize the breakdown voltage characteristics and ruggedness of the lateral DMOS transistor in both the rectilinear and curved regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.