Patent · US Expired

Precise and programmable duty cycle generator

US6593789B2 · kind B2 · utility

29Cited by
23References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 14, 2001
Grant dateJul 15, 2003
Priority date
Expiry dateDec 14, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00039
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A precise and programmable duty cycle generator which can produce a user definable duty cycle clock signal with precision. This circuit is comprised of a number of generally known circuit elements such as a digital to analog converter (DAC), low pass filter (LPF) and operational transconductance amplifier (OTA), as well as a unique voltage controlled duty cycle generator (VCDCG). The circuit has the ability to produce a user programmable duty cycle clock signal with precision over a broad range of operational frequencies. The VCDCG circuit is unique and employs a number of stages, each of which has a current starved inverter which is immediately followed by a conventional inverter to allow duty cycle corrections to be either additive or subtractive. The current starved inverters are controlled by a single voltage, which causes the current starved inverter's delay to degrade/improve on only one transition to effect a change in the duty cycle. For improved precision, a differential embodiment employs the same VCDCG.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.