Method and apparatus for dual issue of program instructions to symmetric multifunctional execution units
US6594753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2000 |
| Grant date | Jul 15, 2003 |
| Priority date | — |
| Expiry date | Mar 6, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor capable of processing at least two program instructions at the same time and capable of issuing the two program instructions to two symmetrical multifunctional program execution units. The microprocessor includes a plurality of registers which store a plurality of operands and an instruction issue control which controls issuance of program instructions to the two symmetrical multifunctional program execution units. The instruction issue control issues the two program instructions (e.g. first and second) without decoding them in order to determine the processing functions required to be performed in response to the two program instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.