Anti-fuse circuit and method of operation
US6597234B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2001 |
| Grant date | Jul 22, 2003 |
| Priority date | — |
| Expiry date | Dec 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An anti-fuse useful in implementing redundancy in a memory utilizes a normal transistor characteristic that is generally considered undesirable in order to provide two easily detected states. The un-programmed state, which is the high impedance state, is achieved simply with a normal transistor in its non-conductive state. The programmed state, which is the low impedance state, is achieved by forcing a normal transistor to conduct current through its gate. This causes the gate dielectric to become permanently conductive. This programmed transistor then is conductive between its source and drain that is easily differentiated from the transistor that is held in its non-conductive state. The result is a fuse technology using an anti-fuse that provides for easily distinguishable programmed and un-programmed states achieved by electrical programming rather than by laser programming.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.