Compensation techniques for electronic circuits
US6597299B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 29, 2002 |
| Grant date | Jul 22, 2003 |
| Priority date | — |
| Expiry date | Apr 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sample and hold circuit including a capacitor is charged to a sample voltage from an open loop circuit such as a transistor circuit controlled by an input voltage. The sample voltage on the capacitor is converted to a digital signal via an ADC (Analog to Digital Converter). A digital correction circuit compensates for differences in voltage between the sample voltage on the capacitor and the input voltage based on properties of the open loop circuit and successive sample voltages on the capacitor. Consequently, nonlinearities can be compensated so that use of an open loop circuit or transistor circuit is less likely to negatively impact an overall accuracy of the ADC device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.