Multilayer circuit board having a capacitor and process for manufacturing same
US6597583B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 17, 2000 |
| Grant date | Jul 22, 2003 |
| Priority date | — |
| Expiry date | Oct 17, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49156
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-layer circuit board comprises: an insulating layer having upper and lower surfaces thereof, and wiring patterns arranged on the upper and lower surfaces of the insulating layer. A ferroelectric layer has a dieletric constant larger than that of the insulating layer and has upper and lower surfaces. The ferroelectric layer is arranged in the insulating layer in such a manner that the upper and lower surfaces of the ferroelectric layer coincide with the upper and lower surfaces of the insulating layer, respectively. A pair of electrode films are formed on the upper and lower surfaces of the ferroelectric layer, respectively, to define a capacitor incorporated in the multi-layer circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.