Error coding structure and method
US6598201B1 · kind B1 · utility
3Cited by
6References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2000 |
| Grant date | Jul 22, 2003 |
| Priority date | — |
| Expiry date | Mar 8, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6505
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decimated and interleaved multiplication table for finite fields as is useful in Reed-Solomon encoding computations. The generator polynomial coefficients determine the multiplication table content and ordering.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.