Method and system of modifying integrated circuit power rails
US6598206B2 · kind B2 · utility
32Cited by
1References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 10, 2001 |
| Grant date | Jul 22, 2003 |
| Priority date | — |
| Expiry date | Jan 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for modifying power rails of an integrated circuit having improved wireability. This is accomplished by initially generating a power railing design of the integrated circuit into a three-dimensional rail based model. Next, analysis of the design is performed as to placement of the power rails in relation to neighboring elements that affects a predefined wireability. Finally, modification of a segment of each power rail that affects wireability is performed so that required power supply to the neighboring elements (e.g., pins, rails etc.) remains unaffected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.