Monitoring and test structures for silicon etching
US6599761B2 · kind B2 · utility
9Cited by
11References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Aug 29, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
A through-substrate etching process is monitored by providing a sacrificial electrode in proximity to a desired etch window on the substrate. An etch process is performed on the substrate. The etch process is monitored by measuring an electrical property of either the substrate or the sacrificial electrode or both.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.