Miller compensated NMOS low drop-out voltage regulator using variable gain stage
US6600299B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Dec 19, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A high power supply ripple rejection (PSRR) internally compensated low drop-out voltage regulator using an output NMOS pass device. The voltage regulator uses an inverting inter-stage variable gain amplifier to adjust its gain in response to a load current passing through the output NMOS device such that as the load current decreases, the gain increases, wherein a second pole associated with the voltage regulator is pushed above a unity gain frequency associated with the voltage regulator. The inverting inter-stage variable gain amplifier is further operational to adjust its gain in response to a load current passing through the power NMOS device such that as the load current increases, the gain decreases, wherein the unity gain bandwidth associated with the loop formed by a compensation capacitor is kept substantially constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.