Method and apparatus for probing an integrated circuit through capacitive coupling
US6600325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Mar 25, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/312
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
One embodiment of the present invention provides a system for capacitively probing electrical signals within an integrated circuit. This system operates by placing a probe conductor in close proximity to, but not touching, a target conductor within the integrated circuit. In this position, the probe conductor and the target conductor form a capacitor that stores a charge between the probe conductor and the target conductor. Next, the system detects a change in a probe voltage on the probe conductor caused by a change in a target voltage on the target conductor, and then determines a logic value for the target conductor based on the change in the probe voltage. In one embodiment of the present invention, determining the logic value for the target conductor involves, determining a first value if the probe voltage decreases, and determining a second value if the probe voltage increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.