Compilable writeable read only memory (ROM) built with register arrays
US6600673B1 · kind B1 · utility
3Cited by
20References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 31, 2003 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Jan 31, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and structure for a pair of read only memory (ROM) cells having a first latch and a second latch connected to the first latch. The first latch and the second latch behave as master and slave latches to one another. The first latch and the second latch include a write bitline connection that is permanently connected to a fixed voltage source to permanently program the first latch and the second latch to permanent ROM values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.