Receiving circuit
US6600795B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1999 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Feb 26, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiving circuit mainly available in a digital modulation type communication system having a plurality of channels, which is capable of reducing power in a receiving system, simplifying the circuit and reducing the power consumption. Upside and downside frequencies corresponding to a central value between channels are separately supplied from a local frequency signal generating circuit 4 to first and second frequency converting circuits 2, 3 so that two output signals are developed with respect to one of a desired wave, upside channel and downside channel. The desired wave present in common in the fist and second frequency converting circuits 2, 3 is extracted in a common wave extracting circuit 5, and a frequency offset of &ohgr;o existing in the output of the common wave extracting circuit 5 is removed a frequency offset circuit 6 and further an unnecessary frequency component is filtered by a filter 8. In addition, the common wave extracting circuit 5 has transformers and, using its inductances, raises the difference between the common wave and the non-common wave within the circuit to more than two times that of a prior art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.