Method and system to increase the performance of high-speed backplanes
US6601007B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2000 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Jul 9, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/044
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit board, for use with a high speed backplane, includes transmitter and receiver with circuitry for correcting for multipath signal errors. A training sequence that is often a pseudo-random signal is transmitted by the transmitter on a first circuit board to a receiver located on a second circuit board. The receiver on the second circuit board includes an analog-to-digital signal converter, an equalizer, and a binary digital-to-analog reconverter for receiving the training sequence. The equalizer preferably comprises a series of connected registers having taps in between, a plurality of individual weighting means attached to each of the taps, and a summing means connected to the weighting means. A training sequence is transmitted from the first circuit board to the receiver on the second circuit board, enabling the receiver to adaptively determine a set of weighting means coefficients for correcting the multipath errors in subsequent signals. Coefficients for the weighting means are then adjusted from the output of the summing means. The method and system described can substantially reduce the cost of backplane fabrication and enhance the performance of the overall system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.