Memory management technique for maintaining packet order in a packet processing system
US6601150B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 1999 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | May 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A memory management technique for maintaining packet order in a packet processing system involves maintaining a START indicator and a VALID indicator for each memory block in a packet memory. Packets are written in a number of successive memory blocks, and the START indicator corresponding to the first memory block of the number of successive memory blocks is set to indicate that the packet is available for processing. The packets are processed by a packet processor. When the packet processor completes the processing of a particular packet, the VALID indicator corresponding to the first memory block associated with that packet is set to indicate that the packet is ready to be forwarded. The packet may become ready to be forwarded out of order. However, the packets are forwarded in first-in-first-out order by processing the packets in first-in-first-out order and only forwarding a particular packet if the VALID indicator corresponding to the first memory block associated with that packet is set to indicate that the packet is ready to be forwarded. Thus, a packet is not forwarded unless and until all previous packets have been forwarded, even if the packet is ready to be forwarded be…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.