Wafer's zero-layer and alignment mark print without mask when using scanner
US6602641B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 19, 2001 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Apr 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F9/7076
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A new method is provided for the use of alignment marks. In prior art methods, a combination mask is mounted in a mask holder. The combination mask contains multiple, different alignment marks for different purposes and steps in a semiconductor processing sequence. This mark is printed onto the surface of a wafer. Using the method of the invention, a reticle is used that does not contain any patterns (a zero-layer reticle), on this zero-layer reticle an alignment mark is created. This zero-layer alignment mark is referred to as the zero-mark alignment mark, this alignment mark can be printed directly onto the wafer surface. Under the invention, the zero-layer reticle takes the place of the prior art mask holder, on the zero-layer reticle an alignment mark is created that can be directly printed from the zero-layer reticle onto the surface of a wafer. The zero-layer reticle further contains a multiplicity of production alignment marks in a location that is fixed with respect to the alignment mark. The location of the alignment marks therefore corresponds to a location of each alignment mark that belongs to the multiplicity of production alignment marks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.