CMOS DAC with high impedance differential current drivers
US6603417B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2002 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Apr 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/685
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
High-performance, digital-to-analog conversion (DAC) suitable for use in systems implemented with low-voltage, low-power integrated circuit fabrication processes is disclosed. Encoder circuitry receives a binary number for which an analog representation is sought. Segments of the binary number are thermometer encoded and complemented to provide signals to drive analog conversion circuitry. The analog conversion circuitry includes sets of current cells, with each cell in a set contributing an equal amount to one or the other of the complementary legs of the analog output of the converter. Each current cell is a fully differential current switch with charge canceling, fed by a regulated cascode current source. The regulated cascode current source offers uncharacteristically high impedance that contributes to good circuit performance even in low-voltage, low-power implementations. Other design factors of the current cell contribute significantly to overall performance. Hierarchical gradient symmetry cancellation techniques are also employed to reduce integral non-linearity attributable to process-related surface gradients.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.