Virtual memory mapping using region-based page tables
US6604184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1999 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Jun 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a method and apparatus to map virtual memory space. A region register file provides a region identifier for a virtual address in the virtual memory space. The virtual address includes a virtual region number and a virtual page number. A virtual page table look-up circuit is coupled to the region register file to generate a page table entry (PTE) virtual address from virtual address parameters. The virtual address parameters include the virtual address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.