Data encoding apparatus and data decoding apparatus
US6604218B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2000 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Jan 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2927
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data encoding apparatus is provided wherein, in one aspect, bit data are encoded by using at least one kind of error-correcting code out of two kinds of error-correcting modes—random error-correcting code mode and burst error correcting code mode. The encoded bit data are then arranged in a specific two-dimensional region in a matrix to form a two-dimensional image, which is then printed on a medium. The encoded bit data may be relocated in accord with a relocation map.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.