Method and arrangement for synchronizing a sigma delta-modulator
US6606043B2 · kind B2 · utility
1Cited by
3References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2001 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Aug 9, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B27/10
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and arrangement for bit-synchronizing a &Sgr;&Dgr;-modulator uses a pre-filter to filter an incoming single bit bitstream. One or more of the integrator states of the &Sgr;&Dgr;-modulator are corrected by a signal which is calculated from the incoming bitstream and at least one of the pre-filtered input signal and the output bitstream of the &Sgr;&Dgr;-modulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.