Method for performing write and read operations in a passive matrix memory, and apparatus for performing the method
US6606261B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2001 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Jul 6, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for performing read and write operations in matrix-addressed memory array of memory cells is described. The memory cells comprising an electrically polarizable material exhibiting polarization remanence, in particular and electret or ferroelectric material, where a logical value stored in a memory cell is represented by an actual polarization state in the memory cell. The degree of polarization in the polarizable material is limited during each read and write cycle to a value defined by a circuit device controlling the read and write operations, with said value ranging from zero to an upper limit corresponding to saturation of the polarization and consistent with predetermined criterta for a reliable detection of a logic state of a memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.